函数发生器外文文献及翻译

《函数发生器外文文献及翻译》由会员分享，可在线阅读，更多相关《函数发生器外文文献及翻译（32页珍藏版）》请在毕设资料网上搜索。

1、外文文献 1 原文： DDS devices to produce high-quality waveform: a simple, efficient and flexible Summary Direct digital frequency synthesis (DDS) technology for the generation and regulation of high-quality waveforms, widely used in medical, industrial, instrumentation, communications, defense and many oth

2、er areas. This article will briefly describe the technology, on its strengths and weaknesses, examine some application examples, and also introduced some new products that contribute to the promotion Introduction A key requirement in many industries is an exact production, easy operation and quick c

3、hange of different frequencies, different types of waveforms. Whether it is broadband transceiver requires low phase noise and excellent spurious-free dynamic performance of agile frequency source, or for industrial measurement and control system needs a stable frequency excitation, fast, easy and e

4、conomical to produce adjustable waveform while maintaining phase continuity capabilities are critical to a design standard, which is what the advantages of direct digital frequency synthesis. Frequency synthesis task The growing congestion of the spectrum, coupled with lower power consumption, quali

5、ty of never-ending demand for higher measuring equipment, these factors require the use of the new frequency range, requires a better use of existing frequency range. A result, the search for better control, in most cases, by means of frequency synthesizer for frequency generation. These devices use

6、 a given frequency, fC of to generate a target frequency (and phase) fOUT the general relationship can be simply expressed as: fOUT = x fC Among them, the scale factor x, sometimes known as the normalized frequency. The equation is usually gradual approximation of the real number algorithms. When th

7、e scale factor is a rational number, two relatively prime numbers (output frequency and reference frequency) than the harmonic. However, in most cases, x may belong to a broader set of real numbers, the approximation process is within the acceptable range will be truncated Direct Digital Frequency S

8、ynthesizer The frequency synthesizer a practical way to achieve is the direct digital frequency synthesis (of DDFS), usually referred to as direct digital synthesis (DDS). This technique using digital data processing to generate a frequency and phase adjustable output, the output anda fixed frequenc

9、y reference clock source fC. related. DDS architecture, the reference or the system clock frequency divided by a scale factor to produce the desired frequency, the scale factor is controlled by the binary tuning word programmable. In short, direct digital frequency synthesizer to convert a bunch of

10、clock pulses into an analog waveform, usually a sine wave, triangle wave or square wave. Shown in Figure 1, its main parts: the phase accumulator (to produce the output waveform phase angle data), relative to digital converter, (above the phase data is converted to the instantaneous output amplitude

11、 data), and digital-to-analog converter (DAC) (the magnitude of data into a sampled analog data points) Figure 1.DDS function of the system block diagram. For the sine wave output, relative to digital converter is usually a sine lookup table (Figure 2). Phase accumulator unit count N a relative to t

12、he frequency of fC, according to the following equation: The number of pulses of the fC: M is the resolution of the tuning word (24-48) N corresponds to the smallest increment of phase change of the phase accumulator output word Figure 2. Typical DDS architecture and signal path (with DACs). Changin

13、g N will immediately change the output phase and frequency, so the system has its own continuous phase characteristics, which is one of the key attributes of many applications. No loop settling time, which is different from the analog system, such as phase-locked loops (PLLs). DAC is usually a high-

14、performance circuit, designed specifically for the DDS core (phase accumulator and phase amplitude converter). In most cases, the results of the device (usually single-chip) is generally referred to as the pure DDS or the C-DDS. Actual DDS devices are generally multiple registers, in order to achiev

15、e a different frequency and phase modulation scheme. Such as phase register, their storage phase of increase in the output phase of the phase accumulator. In this way, the corresponding delay output sine wave phase in a phase tuning word. This is useful for phase modulation applications for communic

16、ation systems. The resolution of the adder circuit determines the number of bits of the phase tuning word, therefore, also decided to delay the resolution. Integrated in a single device on the engine of a DDS and a DAC has both advantages and disadvantages, however, whether integrated or not, need a

17、 DAC to produce ultra-high purity high-quality analog signal. DAC will convert digital sinusoidal output to an analog sine wave may be single-ended or differential. Some of the key requirements for low phase noise, excellent wideband (WB) and narrowband (NB), spurious-free dynamic range (SFDR), and

18、low power consumption. If the external device, the DAC must be fast enough to handle the signal, so the built-in parallel port device is very common. DDS and other solutions The frequency analog phase-locked loops (PLLs), clock generator, and the use of FPGA dynamic programming of the output of the

19、DAC. By examining the spectrum of performance and power of these technologies, a simple comparison, Table 1 shows the qualitative results of the comparison Table 1.DDS with competing technologies - Advanced compare Power consumption Spectral purity Remarks DDS Low Middle Ease of tuning Discrete DAC+

20、FPGA Middle Middle-High With tuning capabilities Analog PLL Milddle High Difficult tuning Phase-locked loop is a feedback loop and its components: a phase comparator, a divider and a pressure-controlled oscillator (VCO), phase comparator reference frequency and output frequency (usually the output f

21、requency is N)frequency) were compared. The error voltage generated by the phase comparator is used to adjust the VCO, thus the output frequency. When the loop is established, the output frequency and / or phase with the reference frequency to maintain a precise relationship. PLL has long been consi

22、dered in a particular frequency range, high fidelity and consistent signal low phase noise and high spurious free dynamic range (SFDR) are ideal for applications. PLL can not be precisely and quickly tuning the frequency output waveform, and the slow response, which limits their applicability for fa

23、st frequency hopping and part of the frequency shift keying and phase shift keying applications. Other programs, including integrated DDS engine field programmable gate arrays (FPGAs) - a synthetic sine wave output with the off-the-shelf DAC - though the PLL frequency-hopping problem can be solved,

24、but there own shortcomings. The defects of the major systems work and interface power requirements, high cost, large size, and system developers must also consider the additional software, hardware and memory. For example, using the DDS engine option in the modern FPGA to generate the 10 MHz output

25、signal dynamic range is 60 dB up to 72 kB memory space. In addition, designers need to accept and be familiar with the subtle balance DDS core architecture. . From a practical point of view (see Table 2), thanks to the rapid development of CMOS technology and modern digital design techniques, as wel

26、l as the improvement of the DAC topology, DDS technology has been able to achieve unprecedented low power consumption in a wide range of applications, spectrum performance and cost levels. Although the pure DDS products in performance and design flexibility to achieve the level of high-end DAC technology and FPGA, but the advantages of DDS in terms of size, power consumption, cost and simplicity, making it the primary choice for many applications. Table 2 Benchmark Analysis Summary - frequency generation technique (50