电子专业毕业设计外文翻译--基于ARM的嵌入式系统的速成样机平台设计

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1、 PDF外文：http:/ 1 中文 5100 字  出处： IEEE Transactions on Consumer Electronics, Vol. 50, No. 2, MAY 2004 英文资料及中文翻译   The Design of a Rapid Prototype Platform for ARM Based Embedded System Rui Wang and Shiyuan Yang Hardware prototype is a vital step in the embedded system design. In this paper, w

2、e discuss our design of a fast prototyping platform for ARM based embedded systems, providing a low-cost solution to meet the request of flexibility and testability in embedded system prototype development. It also encourages concurrent development of different parts of system hardware as well as mo

3、dule reusing.  Though the fast prototyping platform is designed for ARM based embedded system, our idea is general and can be applied to embedded system of other types.  I.INTRODUCTION Embedded systems are found everywhere, including in cellular telephones, pagers, VCRs, camcorders, thermo

4、stats, curbside rental-car check-in devices, automated supermarket stockers, computerized inventory control devices, digital thermometers, telephone answering machines, printers, portable video games, TV set-top boxes - the list goes on. Demand for embedded system is large, and is growing rapidly. &

5、nbsp;In order to deliver correct-the-first-time products with complex system requirements and time-to-market pressure, design verification is vital in the embedded system design process. A possible choice for verification is to simulate the system being designed. If a high-level model for the system

6、 is used, simulation is fast but may not be accurate enough, with a low-level model too much time may be required to achieve the desired level of confidence in the quality of the evaluation. Since debugging of real systems has to take into account the behavior of the target system as well as its env

7、ironment, runtime information is extremely important. Therefore, static analysis with simulation methods is too slow and not sufficient. And simulation cannot reveal deep issues in real physical  2 system.  A hardware prototype is a faithful representation of the final design, guarantying

8、its real-time behavior. And it is also the basic tool to find deep bugs in the hardware. For these reasons, it has become a crucial step in the whole design flow. Traditionally, a prototype is designed similarly to the target system with all the connections fixed on the PCB (printed circuit boards).

9、 As embedded systems are getting more complex, the needs for thorough testing become increasingly important. Advances in surface-mount packaging and multiple-layer PCB fabrication have resulted in smaller boards and more compact layout, making traditional test methods, e.g., external test probes and

10、 "bed-of-nails" test fixtures, harder to implement. As a result, acquiring signals on boards, which is beneficial to hardware testing and software development, becomes infeasible, and tracking bugs in prototype becomes increasingly difficult. Thus the prototype design has to take account o

11、f testability. However, simply adding some test points is not enough. If errors on the prototype are detected, such as misconnections of signals, it could be impossible to correct them on the multiple-layer PCB board with all the components mounted. All these would lead to another round of prototype

12、 fabrication, making development time extend and cost increase. Besides testability, it is important to maintain high flexibility during development of the prototype as design specification changes are common. Nowadays complex systems are often not built from scratch but are assembled by reusing pre

13、viously designed modules or off-the-shelf components such as processors, memories or peripheral circuitry in order to cope with more aggressive time-to-market constraints. Following the top-down design methodology, lots of effort in the design process is spent on decomposing the customers, requireme

14、nts into proper functional modules and interfacing them to compose the target system. Some previous research works have suggested that FPLDs (field programmable logic device) could be added to the final design to provide flexibility as FPLDs can offer programmable interconnections among their pins a

15、nd many more advantages. However, extra devices may increase production cost and power dissipation, weakening the market competition power of the target system. To address these problems, there are also suggestions that FPLDs could be used in hardware prototype as an intermediate approach 1-3, where

16、as this would still bring much additional work to the prototype design. Moreover, modules on the prototype cannot be reused directly. In industry, there have been companies that provide commercial solutions based on FPLDs for rapid prototyping 4.  3 Their products are aimed at SOC (system on a

17、chip) functional verification instead of embedded system design and development. In this paper, we discuss our design of a Rapid Prototyping Platform for ARM based Embedded System, providing a low cost solution to meet the request of flexibility and testability in embedded system prototype developme

18、nt. It also encourages concurrent development of different parts of system hardware as well as module reusing. The rest of the paper is organized as follows. In section 2, we discuss the details of our rapid prototyping platform. Section 3 shows the experimental results, followed by an overall concl

19、usion in section 4. II. THE DESIGN OF A RAPID PROTOTYPING PLATFORM A. Overview ARM based embedded processors are wildly used in embedded systems due to their low-cost, low-power consumption and high performance. An ARM based embedded processor is a highly integrated SOC including an ARM core with a

20、variety of different system peripherals5. Many arm based embedded processors, e.g.6-8, adopt a similar architecture as the one shown in Fig. 1.   The integrated memory controller provides an external memory bus interface supporting various memory chips and various operation modes (synchronous,

21、asynchronous, burst modes). It is also possible to connect bus-extended peripheral chips to the memory bus. The on-chip peripherals may include interrupt controller, OS timer, UART, I2C, PWM, AC97, and etc. Some of these peripherals signals are multiplexed with general-purpose digital I/O pins to provide flexibility to user while other on-chip