外文翻译--利用TI的MSP430系列的嵌入式系统设计(节选)

《外文翻译--利用TI的MSP430系列的嵌入式系统设计(节选)》由会员分享，可在线阅读，更多相关《外文翻译--利用TI的MSP430系列的嵌入式系统设计(节选)（20页珍藏版）》请在毕设资料网上搜索。

1、中文 5030 字 Embedded Systems Design using the TI MSP430 Series（ selection） This book is intended for the embedded engineer who is new to the field, and as an introduction and reference for those experienced with micro-controller development, but are new to the MSP430 family of devices. I have assumed

2、that the reader has some experience with microcontroller-based design, either professionally or academically. As an example, the book de- scribes interrupt functionality in detail, but assumes that you, the reader, already know what an interrupt is and how to use it. It is also important to note tha

3、t, while much of the information in this book is identical to that which is available from the TI documentation, this book is intended to supplement, not replace that valuable source of information. The Users Guides and Application Notes together offer a depth and breadth of technical information th

4、at would be difficult to replicate in a single source. The intent of this book is to highlight some of the most commonly used information, along with some helpful suggestions and rules of thumb. The MSP430 Family The MSP430 family is a broad family of low power, feature rich 16-bit microcontrollers

5、from Texas Instruments. They share a common, RISC-type, Neumann CPU core. The 430 is competitive in price with the 8-bit controller market, and supports both 8 and 16-bit instructions, allowing migration from most similarly sized platforms. The family of devices ranges from the very small (1k ROM, 1

6、28 bytes for RAM, sub-dollar) up to larger (60k ROM, 2k RAM, with prices in the $10 range) devices. Currently, there are at least 40 flavors available, with more being added regularly. The devices are split into three families: the MSP430x3xx, which is a basic unit, the MSP430x1xx, which is a more f

7、eature-rich family, and the MSP430x4xx, which is similar to the 1xx, with a built in LCD driver. You will find these referred to as 1xx, 3xx, and 4xx devices throughout this book. Part Numbering Convention Part numbers for MSP430 devices are determined based on their capabilities. All device part nu

8、mbers follow the following template: MSP430Mt Fa F bMc M: Memory Type C: ROM F: Flash P: OTP E: EPROM (for developmental use. There are few of these.) F a, F b: Family and Features 10, 11: Basic 12, 13: Hardware UART 14: Hardware UART, Hardware Multiplier 31, 32: LCD Controller 33: LCD Controller, H

9、ardware UART, Hardware Multiplier 41: LCD Controller 43: LCD Controller, Hardware UART 44: LCD Controller, Hardware UART, Hardware Multiplier Mc: Memory Capacity 0: 1kb ROM, 128b RAM 1: 2kb ROM, 128b RAM 2: 4kb ROM, 256b RAM 3: 8kb ROM, 256b RAM 4: 12kb ROM, 512b RAM 5: 16kb ROM, 512b RAM 6: 24kb RO

10、M, 1kb RAM 7: 32kb ROM, 1kb RAM 8: 48kb ROM, 2kb RAM 9: 60kb ROM, 2kb RAM Example: The MSP430F435 is a Flash memory device with an LCD controller, a hardware UART, 16 kb of code memory, and 512 bytes of RAM. The part numbering scheme described above is a bit fragmented. There are common features not

11、 consistently represented (type of ADC, number of timers, etc), and there are some other inconsistencies (for example, the 33 family has the multiplier, but the 13 and 43s do not). I would recommend against selecting parts based on their numbering scheme. Rather, once you have a vague idea of your r

12、equirements, go to the TI website (www.TI.com), and use their parametric sort feature. Architecture: CPU and Memory As discussed in chapter 1, the MSP430 utilizes a 16-bit RISC architecture, which is capable of processing instructions on either bytes or words. The CPU is identical for all members of

13、 the 430 family. It consists of a 3-stage instruction pipeline, instruction decoding, a 16-bit ALU, four dedicated-use registers, and twelve working (or scratchpad) registers. The CPU is connected to its memory through two 16-bit busses, one for addressing, and the other for data. All memory, includ

14、ing RAM, ROM, information memory, special function registers, and peripheral registers are mapped into a single, contiguous address space. This architecture is unique for several reasons. First, the designers at Texas Instruments have left an awful lot of space for future development. Almost half th

15、e Status Register remains available for future growth, roughly half of the peripheral register space is unused, and only six of the sixteen available special function registers are implemented. Second, there are plenty of working registers. After years of having one or two working registers, I greatly enjoyed my first experience with the twelve 16-bit CPU scratchpads. The programming style is slightly different, and can be much more