外文翻译--DS1302涓流充电计时芯片

《外文翻译--DS1302涓流充电计时芯片》由会员分享，可在线阅读，更多相关《外文翻译--DS1302涓流充电计时芯片（10页珍藏版）》请在毕设资料网上搜索。

1、中文 2560 字 DS1302 trickle charge timekeeping chip Abstract: Introduces the United States with DALLAS trickle charge current capacity of small low-power real time clock DS1302 circuit structure, working principle and its application in real-time display of application time. It can be years, months, da

2、ys, weekdays, hours, minutes, seconds for time, and has multiple functions, such as a leap year compensation. DS1302 are given in the C51 to read and write procedures and flow chart, as well as in the process of debugging note. Keywords: clock circuit； real-time clock； singlechip； Application 1 Intr

3、oduction Now popular in many of the serial clock circuit, such as the DS1302, DS1307, PCF8485, etc. These circuits interface is simple, inexpensive and easy to use, has been widely used. This paper introduces the DS1302 real time clock circuit is DALLASs a small trickle charge current of the circuit

4、 capacity, the main feature is the use of serial data transmission, can provide programmable power-down protection functions of charge and can be shut down charging functions . 32.768kHz crystal ordinary. 2 DS1302s structure and working principle DALLAS companies DS1302 is the United States launched

5、 a high-performance, low power consumption, with real-time clock circuit of the RAM, it can be years, months, days, weekdays, hours, minutes, seconds for time, with leap year compensation, the working voltage to 2.5V 5.5V. The use of three-wire interface for synchronous communication with the CPU, a

6、nd the use of unexpected ways to send more than one byte of data clock signal, or RAM. DS1302 within a 31 8 for the temporary storage of the RAM data register. DS1302 is the DS1202 to upgrade products, compatible with the DS1202, but the increase of the main power supply / back-pin dual power supply

7、, while providing the power back to the small trickle charge current capacity. FEATURES 1 Real-Time Clock Counts Seconds, Minutes, Hours, Date of the Month, Month, Day of the Week, and Year with Leap-Year Compensation Valid Up to 2100 2 31 x 8 Battery-Backed General-Purpose RAM 3 Serial I/O for Mini

8、mum Pin Count 3 2.0V to 5.5V Full Operation 4 Uses Less than 300nA at 2.0V 5 Single-Byte or Multiple-Byte (Burst Mode) Data Transfer for Read or Write of Clock or RAM Data 1 6 8-Pin DIP or Optional 8-Pin SO for Surface Mount 7 Simple 3-Wire Interface 8 TTL-Compatible (VCC = 5V) 9 Optional Industrial

9、 Temperature Range: -40C to +85C 2.1 Pin function and structure PIN DESCRIPTION 1) X1, X2 32.768 kHz Crystal Pins 2) GND Ground 3) RST Reset 4) I/O Data Input/Output 5) SCLK Serial Clock 6) VCC1, VCC2 Power Supply Pins Figure 1 showing a pin of the DS1302, which Vcc1 for back-up power supply, VCC2-b

10、ased power. In the main power off, the clock is also able to maintain continuous operation. Vcc2 by the DS1302 or whichever Vcc1 the greater power. When Vcc2 than Vcc1 +0.2 V when, Vcc2 power supply to the DS1302. When Vcc1 less than Vcc2 when, DS1302 powered by Vcc1. X1 and X2 is the source of osci

11、llation, an external 32.768kHz crystal. RST is the reset / chip select lines, through the RST input high drive home to start all of the data transfer. RST input has two functions: First, RST access control logic, allowing the address / command sequence into the shift register； Secondly, 2 RST to ter

12、minate the provision of single-byte or multi-byte data transmission. When RST is high, all data are initialized to allow the DS1302 to operate on. If in the course of RST sent home for the low, it will terminate the data transfer, I / O pin into high impedance state. Run-time power, Vcc 2.5V in befo

13、re, RST must remain low. SCLK low only when the RST can be set to high. I / O for serial data input and output side (two-way), followed by a detailed description. Is always the SCLK input. 2.2 DS1302 control byte DS1302 control word as shown in Figure 2. Control byte MSB (bit 7) must be logic 1, if

14、it is 0, are not able to write data in the DS1302, bit 6 if 0, then the calendar clock and data access, that access to RAM to 1 data； bit 5 to bit 1 of the address unit instructions； least significant bit (bit 0) in the case of 0 to write to, read to 1, said operation, the control byte is always the

15、 beginning of the output from the lowest bit. 2.3 Data input and output (I / O) Instruction word in the control input of the next clock rising edge of SCLK, the data is written into the DS1302, data input from the low enthronement 0. Similarly, in the following 8-bit instruction word control after t

16、he next falling edge of SCLK pulse to read out the DS1302 data,read the data from 0 to 7 . 2.4 DS1302 register DS1302 there are 12 registers, which register with the seven calendar, clock related data stored in digital form as a BCD code, the calendar and time registers and control words in Table 1.

17、 In addition, DS1302 year also register, control register, the charge register, the clock register and emergency-related registers, such as RAM. Clock burst read and write registers in addition to the order of one-time charge outside the register contents of all registers. DS1302 registers associate

18、d with the RAM is divided into two types: one is a single RAM unit, a total of 31, each module configuration for an 8-bit bytes, the command control words C0H FDH, in which odd-numbered for the read operation, even for the write operation； the other for the sudden manner of RAM registers, this approach can be a one-time read and write all 31 bytes of RAM, a command control word for the FEH (write), FFH (Reading). 3 DS1302 real-time display of time hardware and software DS1302 connection with the CPU needs three lines, namely, SCLK (7), I / O (6), RST (5). 3.1 DS1302 connection with the CPU