外文翻译---STC89C52 数据手册

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1、附录 B：外文文献及译文 STC89C52 Date Sheet Description The STC89C52 is a low-power， high-performance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured usingAtmels high-density nonvolatile memory technology and is compatible with the industry-standard 8

2、0C51 instruction set and pinout. The on-chip Flash allows the programmemory to be reprogrammed in-system or by a conventional nonvolatile memory programmer.By combining a versatile 8-bit CPU with in-system programmable Flash ona monolithic chip， the Atmel STC89C52 is a powerful microcontroller which

3、 provides ahighly-flexible and cost-effective solution to many embedded control applications. The STC89C52 provides the following standard features: 8K bytes of Flash， 256 bytesof RAM， 32 I/O lines， Watchdog timer， two data pointers， three 16-bit timer/counters， asix-vector two-level interrupt archi

4、tecture， a full duplex serial port， on-chip oscillator， and clock circuitry. In addition， the STC89C52 is designed with static logic for operationdown to zero frequency and supports two software selectable power saving modes.The Idle Mode stops the CPU while allowing the RAM， timer/counters， serial

5、port， andinterrupt system to continue functioning. The Power-down mode saves the RAM contentsbut freezes the oscillator， disabling all other chip functions until the next interruptor hardware reset. VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As anout

6、put port， each pin can sink eight TTL inputs. When 1sare written to port 0 pins， the pins can be used as highimpedanceinputs.Port 0 can also be configured to be the multiplexed loworderaddress/data bus during accesses to externalprogram and data memory. In this mode， P0 has internalpullups.Port 0 al

7、soreceives the code bytes during Flash programmingand outputs the code bytes during program verification.External pullups are required during programverification. Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s

8、are written to Port 1 pins， they are pulled high bythe internal pullups and can be used as inputs. As inputs， Port 1 pins that are externally being pulled low will sourcecurrent (IIL) because of the internal pullups.In addition， P1.0 and P1.1 can be configured to be thetimer/counter 2 external count

9、 input (P1.0/T2)andthetimer/counter 2 trigger input (P1.1/T2EX)， respectively， Port 1 also receives the low-order address bytes duringFlash programming and verification Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.Wh

10、en 1s are written to Port 2 pins， they are pulled high bythe internal pullups and can be used as inputs. Port 2 emits the high-order address byte during fetchesfrom external program memory and during accesses toexternal data memory that use 16-bit addresses (MOVX DPTR). In this application， Port 2 u

11、ses strong internal pull-upswhen emitting 1s. During accesses to external datamemory that use 8-bit addresses (MOVX RI)， Port 2emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and somecontrol signals duringFlash programming and verification. Por

12、t 3 Port 3 is an 8-bit bidirectional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins， they are pulled high bythe internal pullups and can be used as inputs. As inputs， Port 3 pins that are externally being pulled low will so

13、urcecurrent (IIL) because of the pullups.Port 3 also serves the functions of various special featuresof the STC89C52， as shown in the following table.Port 3 also receives some control signals for Flash programmingand verification. RST Reset input. A high on this pin for two machine cycles whilethe o

14、scillator is running resets the device. This pin drivesHigh for 96 oscillator periods after the Watchdog times out.The DISRTO bit in SFR AUXR (address 8EH) can be usedto disable this feature. In the default state of bit DISRTO， the RESET HIGH out feature is enabled. ALE/PROG Address Latch Enable (AL

15、E) is an output pulse for latchingthe low byte of the address during accesses to externalmemory. This pin is also the program pulse input (PROG)during Flash programming.In normal operation， ALE is emitted at a constant rate of1/6 the oscillator frequency and may be used for externaltiming or clockin

16、g purposes.If desired， ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set， ALE is active only during a MOVX or MOVC instruction. Otherwise， the pin is weakly pulled high. Setting the ALE-disable bit has noeffect if the microcontroller is in external execution mode.

17、PSEN Program Store Enable (PSEN) is the read strobe to externalprogram memory.When the STC89C52 is executing code from external programmemory， PSEN is activated twice each machinecycle， except that two PSEN activations are skipped duringeach access to external data memory. EA/VPP External Access Ena

18、ble. EA must be strapped to GND inorder to enable the device to fetch code from external programmemory locations starting at 0000H up to FFFFH.Note， however， that if lock bit 1 is programmed， EA will beinternally latched on reset.EA should be strapped to VCC for internal program executions.This pin

19、also receives the 12-volt programmingenable voltage(VPP) during Flash programming. XTAL1 Input to the inverting oscillator amplifier and input to theinternal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier. 译文： STC89C52 数据手册 功能特性描述 STC89C52 是一种低功耗、高性能 CMOS8 位微控制器，具有 8K

20、在系统可编程 Flash 存储器。使用高密度非易失性存储器技术制造，与工业 80C51 产品指令和引脚完全兼容。片上 Flash 允许程序存储器在系统可编程，亦适于常规编程器。在单芯片上，拥有灵巧的 8 位 CPU 和在系统可编程 Flash，使得 STC89C52为众多嵌入式控制应用系统提供高灵活、超有效的解决方案。 STC89C52 具有以下标准功能； 8k 字节 Flash， 256 字节 RAM， 32 位 I/O 口线，看门狗定时器， 2 个数据指针，三个 16 位定时器 /计数器，一个 6 向量 2 级中断结构，全双工串行口，片内晶振及时钟电路。另外， STC89C52 可降至 0

21、Hz 静态逻辑操作，支持 2 种软件可选择节电模式。空闲模式下， CPU 停止工作，允许 RAM、定时器 /计数器、串口、中断继续工作。掉电保护方式下， RAM 内容被保存，振荡器被冻结，单片机一切工作停止，直到下一个中断或硬件复位为止 。 VCC : 电源 GND: 地 P0 口： P0口是一个 8位漏极开路的双向 I/O口。作为输出口 ， 每位能驱动 8个 TTL逻辑电平。对 P0端口写 “1”时 ， 引脚用作高阻抗输入。当访问外部程序和数据存储器时 ， P0口也被作为低 8位地址 /数据复用。在这种模式下 ， P0具有内部上拉电阻。在 flash编程时 ， P0口也用来接收指令字节；在程

22、序校验时 ， 输出指令字节。程序校验时 ， 需要外部上拉电阻。 P1 口： P1口是一个具有内部上拉电阻的 8 位双向 I/O 口 ， p1 输出缓冲器能驱动4个 TTL 逻辑电平。对 P1 端口写 “1”时 ， 内部上拉电阻把端口拉高 ， 此时可以作为输入口使用。作为输入使用时 ， 被外部拉低的引脚由于内部电阻的原因 ， 将输出电流（ IIL）。此外 ， P1.0和 P1.2分别作定时器 /计数器 2的外部计数输入（ P1.0/T2）和时器 /计数器 2的触发输入（ P1.1/T2EX） ， 在 flash编程和校验时 ， P1口接收低 8位地址字节。 P2 口： P2口是一个具有内部上拉电阻的 8 位双向 I/O 口 ， P2 输出缓冲器能驱动4个 TTL 逻辑电平。对 P2 端口写 “1”时 ， 内部上拉电阻把端口拉高 ， 此时可以作为输入口使用。作为输入使用时 ， 被外部拉低的引脚由于内部电阻的原因 ， 将输出电流（ IIL）。在访问外部程序存储器或用 16位地址读取外部数据存储器（例如执行 MOVX DPTR）时 ， P2 口送出高八位地址。在这种应用中 ， P2 口使用