LM1881视频同步分离器中英文翻译

《LM1881视频同步分离器中英文翻译》由会员分享，可在线阅读，更多相关《LM1881视频同步分离器中英文翻译（14页珍藏版）》请在毕设资料网上搜索。

1、PDF外文：http:/ LM1881-X   Video Sync Separator General Description                                          The LM1881 Video sync separator extracts timing information including composite and

2、vertical sync, burst/back porch timing, and odd/even field information from standard negative going sync NTSC, PAL* and SECAM video signals with amplitude from 0.5V to 2V p-p. The integrated circuit is also capable of providing sync separation for non-standard,faster horizontal rate video signals. T

3、he vertical output is produced on the rising edge of the first serration in the vertical sync period. A default vertical output is produced after a time delay if the rising edge mentioned above does not occur within the externally set delay period, such as might be the case for a non-standard video

4、signal. Features AC coupled composite input signal >10 k input resistance <10 mA power supply drain current Composite sync and vertical outputs Odd/even field output Burst gate/back porch output Horizontal scan rates to 150 kHz Edge triggered vertical output Default triggered vertical output f

5、or non-standard video signal (video games-home computers)   -40C to +85C operation (LM1881-X) Application Notes The LM1881 is designed to strip the synchronization signals from composite video sources that are in, or similar to, the N.T.S.C. format. Input signals with positive polarity video (i

6、ncreasing signal voltage signifies increasing scene brightness) from 0.5V (p-p) to 2V (p-p) can be accommodated. The LM1881 operates from a single supply voltage between 5V DC and 12V DC. The only required external components besides a power supply decoupling capacitor at pin 8 and a set current dec

7、oupling capacitor at pin 6, are the composite input coupling capacitor at pin 2 and one resistor at pin 6 that sets internal current levels. The resistor on pin 6 (i.e. Rset) allows the LM1881 to be adjusted for source signals with line scan frequencies differing from 15.734 kHz. Four major sync sig

8、nals are available from the I/C； composite sync including both horizontal and vertical scan timing information； a vertical sync pulse； a burst gate or back porch clamp pulse； and an odd/even output. The odd/even output level identifies which video field of an interlaced video source is present at th

9、e input. The outputs from the LM1881 can be used to gen-lock video camera/VTR signals with graphics sources,provide identification of video fields for memory storage,recover suppressed or contaminated sync signals, and provide timing references for the extraction of coded or uncoded data on specific

10、 video scan lines.                                                                        To better understand the LM188

11、1 timing information and the type of signals that are used, refer to Figure 1(a-e) which shows a portion of the composite video signal from the end of one field through the beginning of the next field. COMPOSITE SYNC OUTPUT                      

12、      The composite sync output, Figure 1(b), is simply a reproduction of the signal waveform below the composite video black level, with the video completely removed. This is obtained by clamping the video signal sync tips to 1.5V DC at Pin 2 and using a comparator threshold set just

13、 above this voltage to strip the sync signal, which is then buffered out to Pin 1. The threshold separation from the clamped sync tip is nominally 70 mV which means that for the minimum input level of 0.5V (p-p), the clipping level is close to the halfway point on the sync pulse amplitude (shown by

14、the dashed line on Figure 1(a). This threshold separation is independent of the signal amplitude, therefore, for a 2V (p-p) input the clipping level occurs at 11% of the sync pulse amplitude. The charging current for the input coupling capacitor is 0.8 mA, Normally the signal source for the LM1881 i

15、s assumed to be clean and relatively noise-free, but some sources may have excessive video peaking, causing high frequency video and chroma components to extend below the black level reference. Some video discs keep the chroma burst pulse present throughout the vertical blanking period so that the b

16、urst actually appears on the sync tips for three line periods instead of at black level. A clean composite sync signal can be generated from these sources by filtering the input signal. When the source impedance is low, typically 75, a 620 resistor in series with the source and a 510 pF capacitor to

17、 ground will form a low pass filter with a corner frequency of 500 kHz. This bandwidth is more than sufficient to pass the sync pulse portion of the waveform； however, any subcarrier content in the signal will be attenuated by almost 18 dB, effectively taking it below the comparator threshold. Filte

18、ring will also help if the source is contaminated with thermal noise. The output waveforms will become delayed from between 40 ns to as much as 200 ns due to this filter. This much delay will not usually be significant but it does contribute to the sync delay produced by any additional signal proces

19、sing. Since the original video may also undergo processing, the need for time delay correction will depend on the total system, not just the sync stripper. VERTICAL SYNC OUTPUT A vertical sync output is derived by internally integrating the composite sync waveform (Figure 2). To understand the gener

20、ation of the vertical sync pulse, refer to the lower left hand section Figure2. Note that there are two comparators in the section. One comparator has an internally generated voltage reference called V1 going to one of its inputs. The other comparator has an internally generated voltage reference ca

21、lled V2 going to one of its inputs. Both comparators have a common input at their noninverting input coming from the internal integrator. The internal integrator is used for integrating the composite sync signal. This signal comes from the input side of the composite sync buffer and are positive goi

22、ng sync pulses. The capacitor to the integrator is internal to the LM1881. The capacitor charge current is set by the value of the external resistor RSET. The output of the integrator is going to be at a low voltage during the normal horizontal lines because the integrator has a very short time to c

23、harge the capacitor, which is during the horizontal sync period. The equalization pulses will keep the output voltage of the integrator at about the same level, below the V1 During the vertical sync period the narrow going positive pulses shown in Figure 1 is called the serration pulse. The wide neg

24、ative portion of the vertical sync period is called the vertical sync pulse. At the start of the vertical sync period,before the first Serration pulse occurs, the integrator now charges the capacitor to a much higher voltage. At the first serration pulse the integrator output should be between V1 an

25、d V2. This would give a high level at the output of the comparator with V1 as one of its inputs. This high is clocked into the D flip-flop by the falling edge of the serration pulse (remember the sync signal is inverted in this section of the LM1881). The Q output of the D flip-flop goes through the OR gate, and sets the R/S flip-flop. The output of the R/S flip-flop enables the internal oscillator and also clocks the