DDS信号发生器外文资料翻译

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1、浙江科技学院毕业设计（论文）（外文翻译） Design of Digital Controlled Signal Generator Based on DDS and MCU Yinjun Chena, Zehuai Yuan Faculty of Electronic Information and Mechanical Electrical Engineering, Zhaoqing University, Zhaoqing 526061, China Keywords: DDS； MCU； Signal generator； Phase Accumulator； DAC Abstract

2、. Its advantage to use DDS chip is output signal frequency bigger, and precision higher, Butusers cant change the output signal waveforms. The MCU can produce the required arbitrary waveforms, but its program execution of the order limit the speed.So we use their Synergy to designthe digital control

3、led signal generator. The System has the advantage of output good qualitywaveform, frequency of precision and stability ,and high frequency, empty, amplitude and phase is tostep into the need. Introduction The digitally synthesized sine waveform (Direct Digital Synthesis, DDS) is a well-known method

4、 andhas been applied to many embedded applications 1. This technique can be used to create a positivedigital sine waveform. Compared to other frequency composing method, Direct Digital FrequencySynthesis(DDS) has been the most popular trend in modern frequency synthetic technique for itsexcellent ch

5、aracteristics. The signal source that the DDS technology realizes can carry out accuratecontrolling on DDS frequency , extent , phase exporting wave forms etc. by numerical control circuit,the system making use of this method has many merits such as stability, reliably and accuracy. The commercial D

6、DS chip can only export a sine wave for the data in the ROM form already hasbeen solidified. If needing to come into being any wave form, it may come true by the way that FPGAadopts DDS IP core or hardware describe language etc, however,the cost of This way cost is high； onthe other hand, any wave f

7、orm can be achieved by making use of micro controller unit (MCU) to carryout figure frequency combining and DA converting. The experiment and applying testing have shownthat the numerical control signal source composed of STM32 micro controller and DDS chip canwork well. DDS and wave form programmin

8、g pattern The core of DDS system is phase accumulator carriage, and it is composed of a ADR and one 浙江科技学院毕业设计（论文）（外文翻译） unitphase register. When any clock comes, the phase register increases by with the step length, phaseregister output and phase control word add together, and then the output is im

9、ported to sine inquiryform address. The sine inquiring form includes the numeral extent information of one-period sine wave, each address corresponds to the phase dot of 0360 degrees of the sine wave. The mapping digital signaldrives DAC and outputs analog value. The output sine circle and frequency

10、 are The phase register will return to the original state when the 2N/M fc clock is finished. Accordingly,the DDS system output a sine wave when the sine inquiring form finish a circle. The output sine circleand frequency is TO -output sine wave circle, unit: s； TC -external referenced clock circle,

11、 unit: s；M -accumulated step length of phase register, constant； f out -output sine wave frequency, unit: Hz； f c -external referenced clock frequency, unit: Hz； N -phase accumulator digit, constant. The relationship among the frequency control word, and the output signal frequency and the reference

12、d clock frequency are: Frequency control word is directly proportional to the output signal frequency. In order to describeclearly, the sine wave form is as one vector turns around phase circle, the phase circle matches alongwith a cycle sine wave. Every sampling pots in wave form corresponds to a p

13、hase dot of the phasecircle. To synthesis the required frequency signal, it needs to accomplish the following steps 1. Controlling every sampling increment of phase and accumulating them (frequency control word K),output 2 pi cumulated phase (using phase accumulator). 2. Converting 2 pi accumulating

14、 phase into the corresponding sine amplitude, use ROM to store thecorresponding phase-extent form of sine function in general. 3. Use DAC to change extent code into the signal simulating voltage. 4. The voltage signal that DAC exports is ladder wave form , the required simulation voltage out isachie

15、ved after LPF smoothing. 浙江科技学院毕业设计（论文）（外文翻译） Numerical control DDS signal source system designs analysis System uses the STM32 as control core and the AD9850 as generator. STM32 is 32-bit ARM-basedmicro controller with 128 K byte flash memory. The two signal output of STM32 can be achieved by contr

16、olling AD9850 and DAC0832 outputsimultaneously. The system designs block diagram is shown in Fig. 1. One signal output can generate30 MHz sine wave and rectangular wave by controlling AD9850, the other output generate any waveform with its frequency less than 10 KHz by numerical frequency mixture of

17、 DAC0832. Fig. 1 System designs block diagram Hardware design AD9850 module AD9850 contains the DDS system and high-speed comparator. The AD9850 can realize the entirenumerical frequency combining. The core of the programmable DDS is the phase accumulator, it iscomposed of a ADR and a N bit phase re

18、gister, N is for 24 32. After connecting to the accurate clock source and writing the frequency phase control word, AD9850 can generate the frequency-programmable and phase-programmable output of analog sinewave, which can be used as the direct frequency signal source or be transferred into rectangu

19、lar wavethrough high-speed comparator. With the 125 MHz clock, 32-bit frequency control word can carry out the output frequency resolution ratio of AD9850 with 0.0291 Hz4. DAC0832 module The circuit exports the phase data sheet to DAC0832 from STM32 and gets corresponding waveform by DA converting.

20、The step-by-step adjusting phase amounts can create arbitrary frequency, thePWM signal from the STM32 transfers into the corresponding voltage by low-pass filter, therefore,the referenced voltage of DAC0832 is controlled, furthermore, the output wave form extent is tunedappropriately. The digital to analog conversion circuit is shown in Fig.2