1、- 1 - 摘 要 MCS-51 单片机是在一块芯片中集成了 CPU、RAM、ROM、定时器/计数器和多功 能 I/O 等一台计算机所需要的基本功能部件，是业界广泛使用的单片机系列。基于 FPGA 平台的 8051 单片机 CPU 核与传统 MCS-51 单片机完全兼容，但速度约为传统单 片机的 20 倍，且在 FPGA 内可轻松的集成许多高性能系统功能，这将使系统的设计 效率和系统性能获得极大的提高，这也是现代电子设计技术的发展方向。 本课题用硬 件描述语言设计 MCS-51 CPU 核，从 CPU 的总体结构到局部功能的实现采用了自顶向 下的设计方法和模块化的设计思想，利用 FPGA，设计
2、实现了八位 CPU 核。本设计的 CPU 兼容 51 指令，在时钟频率和指令的执行效率指标上均优于传统的 MCS-51CPU。本 设计以硬件描述语言代码形式存在，可与任何综合库、工艺库以及 FPGA 结合开发出 用户需要的固核和硬核，可读性好，易于扩展使用，易于升级，比较有实用价值。本 设计通过 FPGA 验证。 关键字：Verilog HDL； CPU； FPGA - 2 - ABSTRACT MCS-51 MCU is a single chip integrated CPU, RAM, ROM, timer / counters and multi-function I / O such
3、 as a computers basic features required, is the industrys widely used microcontroller series. 8051 FPGA-based CPU platform with the traditional core is fully compatible with MCS-51 microcontroller, but the speed is about 20 times that of traditional single chip, and the FPGA can be easily integrated
4、 within a number of high-performance system functions, which will enable the design of the system efficiency and system Be greatly improved performance, which is the development of modern electronic design direction. The issue with the hardware description language design MCS-51 CPU core, from the CPU to the local function of the overall structure of the realization of using top-down design and modular design, the use of FPGA, design and implementation of the eight CPU cores. The CPU model i
