1、3300 英文单词， 1.7 万英文字符 ， 中文 5450 字 文献出处： Pazos S M, Aguirre F L, Palumbo F, et al. Performance-reliability trade-offs in short range RF power amplifier designJ. Microelectronics Reliability, 2018, 88: 38-42. Performance-reliability trade-offs in short range RF power amplier design S.M. Pazos, F.L. Agu
2、irre, F. Palumbo, F. Silveira Abstract In this work, trade-offs between performance and reliability in CMOS RF power ampliers at the design stage are studied. The impact of transistor sizing, amplier class and on-chip matching network design are explored for a 130 nm technology and the implications
3、of design decisions in transistor gate oxide reliability are discussed and projected. A strong trade-off is observed between efficiency and reliability, mainly for different on-chip output matching architectures. A comparison between two example designs is performed via SPICE simulations that includ
4、e reliability models and the effects of aging on the stress conditions of each amplier. Keywords: Power amplier; Breakdown; Hot carriers; Design 1. Introduction Short range RF Complementary Metal Oxide Semiconductor (CMOS) transmitters are ourishing in the current Internet of Things (IoT) paradigm f
5、or a wide range of applications including health monitoring 1. In this scenario, critical applications involving this kind of circuits require a conscientious evaluation of reliability at a design stage, exploring trade-offs between performance aspects and expected reliability. Transistor level reli
6、ability hazards have been widely studied to ensure a suitable working lifetime for products along the CMOS technology roadmap. Constant downscaling and increasing electric eld in transistors made of time dependent dielectric breakdown (TDDB) 2 and Hot Carrier Injection (HCI) 3 a severe threat to device oxide reliability. But a majority of this research has been focused at the product level for, mostly, digital devices with very large scale of integration. Nevertheless, many effor
