1、 I 计算机与信息工程系 脉冲与数字电路 课程设计报告 专业 _ _ 班级 _ _ 学号 _ 姓名_ 报告完成日期 _ 指导教师 _ _ 评语： 成绩： 批阅教师签名： 批阅时间： II 基于 FPGA的数字钟 摘 要 钟表是现代人类日常生活中必不可少的工具，数字钟更是现代社会时钟发展 的一个重要方向。数字钟具有其突出的可随时控制调节时间、计时精确等优势和 特点，被广泛地应用于社会生活的各个方面。本设计就是通过应用生活生产中常 见的逻辑电路元件设计出具有计时和调时功能的数字钟。 本文主要从数字钟的设计原理、设计方案入手详细地介绍了数字时钟的硬件 设计、软件设计和下载调试。在设计过程中要处理好以
2、下几个关键方面：各种计 数器、调节控制电路、显示器程序设计。计数器的设计关系到时钟计时的进位与 精确度，调节控制电路是调节时间的关键。最后，利用 QUARTUS仿真设计软件 和设计开发板的特点和优势，结合实践，设计出具有基本调节控制功能的数字时 钟。 关键词：数字钟，计数器，开发板，VHDL 语言 III Based on FPGA digital clock Abstract Clocks and watches is the modern human daily life essential tools, a digital clock is the development of mode
3、rn society clock an important direction. A digital clock has its outstanding may at any time control regulation time, accurate timing advantages and characteristics, and is widely used in various aspects of their life. This design is through the application in production of the common life logic cir
4、cuit components design has the function of the timing and when a digital clock. This article is mainly from the digital clock design principle, and the design of digital clock is introduced in detail the hardware design, software design and download debugging. In the design process to handle the following a few key aspects: all kinds of counter, adjust control circuit, monitor the program design. The d
