1、III 用用 VHDLVHDL 语言设计智能抢答器鉴别和计时模块语言设计智能抢答器鉴别和计时模块 摘要摘要 伴随着集成电路(IC)技术的发展,EDA 技术已经成为现代电子设计的发展趋势，并在 各大公司、企事业单位和科研教学部门广泛使用。VHDL 是一种全方位的硬件描述语 言， 几乎覆盖了以往各种硬件描述语言的功能， 整个自顶向下或自底向上的电路设计过程 都可以用 VHDL 来完成。本文阐述了 EDA 的概念和发展、VHDL 语言的优点和语法结构 并分析讲解了智能抢答器的各模块的功能要求、 基本原理以及实现方法。 本系统的设计就 是采用 VHDL 硬件描述语言编程，基于 Quartus II 平
2、台进行编译和仿真来实现的，其采用 的模块化、 逐步细化的设计方法有利于系统的分工合作， 并且能够及早发现各子模块及系 统中的错误，提高系统设计的效率。本设计主要的功能是：1.对第一抢答信号的鉴别和锁 存功能； 2.限时功能 3.记分功能 4.数码显示。 关键词 电子设计自动化(EDA)；VHDL；抢答器；自顶向下的设计方法 IV The identification and timing module of the Answering snatches based on VHDL ABSTRACT As the fast development of the integrated circui
3、t technology,Electronic design automation (EDA)technology has become the trend of modern electronic design,whats more,it has been widely used by each big company, the enterprises and Scientific Institutions .VHDL is a kind of hardware description language,which is all-rounds, nearly covers the funct
4、ion of each other kind of hardware description language .Both the entire top-down and bottom-Up circuit design process could be accomplished by VHDL.This article elaborates the concept and development of EDA ,explains the advantages and grammar structure of VHDL ,meanwhile, analysed the function req
5、uest, the basic principle as well as the method of accomplishment of each parts. This systems design programmes in the VHDL, compiled and emulated basing on Quartus II platform of Altera. Using the modulation,and the gradually detailing design method is of great benefit for the systems division of l
6、abor and cooperation ,besides,the usage of this method can detect errors, as early as possible , in various of submodules and system, enhancing the efficiency of the system design. The main feature of this design are:1. Accurately identificating of the signal of the first answer and latching this signal ; 2. The time limited function3. Score function 4. Digital display fuction. KEY WORDS EDA;VHDL;the answering snatches;top-down design method V 目目 录录 中文摘要中文摘要 ABSTRACTABSTRACT 1 绪 论 .
