1、 xx 大学学士学位论文 - I - 基于 FPGA 的数字 电子 钟系统设计 摘要 随着电子技术的飞速发展，现代电子产品渗透到了社会的各个领域，并有力地推动着社会生产力的发展和社会信息化程度的提高。在现代电子技术中，可编程器无疑是扮演着重要角色。 现场可编程门阵列 (FPGA)是近年来迅速发展起来的新型可编程器，其灵活的可编程逻辑可以方便的实现高速数字信号处理。它突破了并行处理、流水级数的限制，具有反复的可编程能力，从而有效的地利用了片上资源，加上高效的硬件描述语言 (VHDL)，从而为数字系统设计提供了极大的方便。本文较系统地介绍了 FPGA 的基本结构、 基本原理、功能特点及其应用；阐述
2、了数字系统设计的基本思想及设计流程，同时，也概述了 FPGA 在数字系统设计中的作用，基于 FPGA 的数字系统设计方法和流程；简要介绍了 VHDL 语言的发展历程， VHDL 语言的功能特点等。 本文的主要内容是根据上述原理和方法设计一个电子钟系统，目的在于通过该系统的功能，体现出 FPGA 在数据处理中的应用。该电子钟系统功能齐全，设计思路清晰。系统程序基于 VHDL 语言，采用模块化设计方法。系统设计包含 8 个子程序模块：分频组件、六十进制计数器组件、二十四进制计数器组件、闹钟设定组件、校时组件 、 i60BCD 组件、 i24BCD 组件、 以及 二进制转换成七段码组件。每个子程序均
3、经过 EDA 工具仿真，并附有仿真图，最后将各模块组装为一个整体 电子钟。 关键词 电子设计自动化 ； 现场可编程门阵列 ； 硬件描述语言 ；电子钟 xx 大学学士学位论文 - II - Digital Electronic Clock Design Based on Technology of FPGA Abstract With the rapid development of electronic technology, modern electronic products have infiltrated into various fields of the society, and
4、have effectively promoted the development of social productive forces and social information, also increased. In modern electronic technology, the programmable logic devices play a key role. Field programmable gate arrays (FPGA), a new type of programmable device, is developing rapidly recent years.
5、 It introduced the concept of flexible programmable logic, which can realize high-speed digital signal processing conveniently. It broke through the parallel processing, water levels of restrictions, has repeatedly programmable capacity to effectively use the on-chip resources, coupled with efficien
6、t hardware description language VHDL, so as to design digital systems conveniently. This article introduces a system of the basic structure of the FPGA, the basic principle of features and applications； expounded on the basic design of digital systems thinking and design process, at the same time, a
7、lso outlined the FPGA in the design of digital systems, FPGA-based digital system design methods and processes； gave a briefing on the development of VHDL language, VHDL language and other features. The main work is based on the principles and methods, design an electronic clock system to the adopti
8、on of the system, embodied in the FPGA data processing of applications. The electronic clock system is fully functional, designed clear ideas. Based on VHDL system procedures, The system is modular in design methods. It includes 8 sub-system design process modules： frequency division system, 60 M co
9、unter system, 24 M counter system, Alarm clock settings system, timing system, i60BCD system, i24BCD system, and convert binary into Seven-Segment code system. each subroutine have been simulated by EDA tools, with a simulation map. The modules will be the final assembly as a whole - the electronic clock. Key words EDA；FPGA； VHDL； Electronic clock
