1、中文 2970 字， 1825 单词 附 录 一、英文原文 : The Principle of Microcontroller In operation the Single Chip Microcomputer (SCM)is connected to a host PC microcomputer via aserial port. The connecting cable is included with the unit. The SCM is supplied fitted with an 8751 chip. This chip features internal ROM con
2、taining versatile,real time monitor to communicate with a PC via the built-in serial port. The monitor includes a line assembler, disassembler, break points, single stepping and the facility to examine and exchangememory or register contents. A special function of the monitor is to store the program
3、 under development in the RAM of the SCM development board. The great advantage of the method that is direct access to the I/O ports is provided by the 8051 is retained and, consequently,the need for a costly in-circuit-emulation (ICE)package is not required. Once a program has been completed on the
4、 SCM development system it can be easily transferred intothe ROM of another 8751 via an EPROMprogrammer. This second 8751, now containing the control program, can be removed from the Programmer and installed into the SCM-TB target board. Most importantly, because direct access to the input/output po
5、rts of the 8751 has been retained during the development stage there is no need for peripheral I/O and address decoding chips； only the8751 chip is required. Thus the Single Chip Micro-Control, not multi-chip control is realised. The SCM-TB target board featureasingle 40-wayDIL socket for the micro-
6、controller chip plus termination facilities identical to the SCMDevelopment Board for simple and convenient transfer of any connecting cables. 8751 ICS should be purchased separately for the target board.In addition to the Single Chip Development System and Target Board, a number of add-on boards ar
7、e available. These include a Port Monitor Board,Multi-Channel ADC, Screw Terminal Board andOutput Driver Board. Voice input to a machine is the most natural form of man-machine communications. Research coming to fruition overthe past several years indicates that the techniques of manmachine communic
8、ation by voice constitute a whole new range of communication servicesservices that can extend mans capabilities, serve his social needs, and increase his productivitySpeech recognition can be defined as the technologywhich makes it possible for a computer to accept voice dataas input and then identi
9、fy the word or phrases. There is atwofold rationale for a speech-recognition systea: (1) It is an easier means for noncomputerprofessionalstoenter data into the computer. (2) In certain applications, such as in semiautomatedquality-control inspection procedures, computer usersneed to use their hands
10、 for other tasks. Speech recognition is a part of a broader speech processingtechnology involving computer identification or verificationof speakers, computer synthesis of speech, production ofstoredspokenresponses,computer analysis of the physicaland psychological state of the speaker, efficienttra
11、nsmission of spoken conversations, detection of speechpathologies, and aids to the handicapped , taking machinestalk and listen to humans depends upon economical implementationof speech synthesis and speech recognition.A number of different feature sets have been proposedto represent speech signals；
12、 these include energy and zerocrossing rates, formant filtering, short time spectrum,waveform digitization and linear predictive coding (LPC). The motivation for choosing one feature set over another isoften complex and highly dependent an constraints imposedupon the system, e.g., cost, speed, respo
13、nse time, computationalcomplexity, etc- Of all the many available feature sets, linear predictive coding is usually the most effectiveone . There are many classifications forcomputers, ranging from inexpensive microcomputers used in homes and offices, to liquid-cooled supercomputers used in universi
14、ties and research laboratories. The present invention relates tomicrocomputers, also known as personal computers (or PCs). A microcomputer can be defined as a computer having a mass-produced integrated circuit microprocessor, such as, for example, the Intel 8086 family of products which presently in
15、cludes the 8086, 80286, 80386 and 80486 microprocessors. Although the microprocessor is the heart and defining feature of a microcomputer, it is not very useful unless it is integrated with a memory and a set of input/output (I/O) devices, also known as peripherals. These three classes of devices co
16、mmunicate among themselves over a shared set of digital signal lines called a bus. The bus is logically organized into sets of address, data, and control lines. The address lines are for communicating device addresses which uniquely identify a particular device on the bus. The data lines are for com
17、municating binary data between two bus devices, a bus master, which initiates a data transfer by placing an address on the address lines, and a bus slave, which reads and decodes the address generated by the bus master as its own. The control lines are for coordinating access to the bus and selectin
18、g a mode of operation on the bus such as write data or read data modes. For example, if the bus master is a microprocessor and the bus slave is a memory, the microprocessor may direct the memory to be read by placing the proper logic level on a write/read control line. In this way, the microprocesso
19、r gains access to the data stored in the memory location specified by the logic levels placed on the address lines by the microprocessor. A bus cycle begins when the bus master directs a write or a read on the bus. The bus cycle is completed after all data has been transferred across the bus and the
20、 bus master releases control of the bus. If the two devices communicating with each other over the bus operate at the same speed, then a bus cycle may be achieved over a minimum number of clock cycles. If, on the other hand, a bus device can only transmit or receive data over many clock cycles, then
21、 a delay must be injected into the state sequencing of the faster device. In such cases, a ready control line is typically activated by the slower device to indicate to the faster device that data is available on the bus or has been taken from the bus. Buses may be generally classified as synchronou
22、s or asynchronous, where synchronous buses are distinguished by the requirement that all bus devices synchronize their use of the bus by a single clock source (or a fundamental frequency). An example of a synchronous bus used in a microcomputer is the IBM PC AT I/O Channel, AT-bus or Industry Standa
23、rd Architecture bus (ISA-bus). Present bus frequency standards for the ISA-bus are 8 MHz and 10 MHz. The ISA-bus, an example of a synchronous bus, is used with the Intel 80386 microprocessor. The ISA-bus provides a 16-bit data bus and a 24-bit address bus. For purposes of this discussion, the contro
24、l lines of the ISA-bus include four bus cycle definition lines. The bus cycle definition lines define the type of bus cycle being performed. (In the following definitions, and throughout the remainder of this patent document, all signal names that are terminated with an asterisk * indicate an active low signal). A bus cycle definition line called memory read (MEMR*) is active
