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    毕业设计外文翻译--基于C51兼容微处理器单片机的PWM控制器设计

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    毕业设计外文翻译--基于C51兼容微处理器单片机的PWM控制器设计

    1、外文原文:http:/  1 附录 A 英文原文  Design of PWM Controller in a MCS-51 Compatible MCU Author . Yue-Li Hu, Wei Wang  Microelectronic Research & Development Center   Campus P.O.B.221, 149 Yanchang Rd, Shanghai 200072, China                  

    2、                   Introduction PWM technology is a kind of voltage regulation method by controlling the switch frequency of DC power with fixed voltage to modify the two-end voltage of load. This technology can be used for a variety of applications inclu

    3、ding motor control, temperature control and pressure control and so on. In the motor control system shown as Fig. 1, through adjusting the duty cycle of power switch, the speed of motor can be controlled. As shown in Fig. 2, under the control of PWM signal, the average of voltage that controls the s

    4、peed of motor changes with Duty-cycle ( D = t1/T in this Figure ), thus the motor speed can be increased when motor power turn on, decreased when power turn off.  Fig.1: The Relationship between Voltage of Armature and  Fig.2  Architecture of PWM       Module   &nb

    5、sp;                          Therefore, the motor speed can be controlled with regularly adjusting the time of turn-on and turn-off. There are three methods could achieve the adjustment of duty cycle: (1) Adjust frequency with fixed pu

    6、lse-width. (2) Adjust both frequency and pulse-width. (3) Adjust pulse-width with fixed frequency.  Generally, there are four methods to generate the PWM signals as the following: (1) Generated by the device composed of separate logic components. This method is the original method which now has

    7、 been discarded. (2) Generated by software. This method need CPU to 外文翻译  2 continuously operate instructions to control I/O pins for generating PWM output signals, so that CPU can not do anything other. Therefore, the method also has been discarded gradually. (3) Generated by ASIC. The ASIC ma

    8、kes a decrease of CPU burden and steady work generally has several functions such as over-current protection, dead-time adjustment and so on. Then the method has been widely used in many kinds of occasion now. (4) Generated by PWM function module of MCU. Through embedding PWM function module in MCU

    9、and initializing the function, PWM pins of MCU can also automatically generate PWM out signals without CPU controlling only when need to change duty-cycle. It is the method that will be implemented in this paper. In this paper, we propose a PWM module embedded in a 8051 microcontroller. The PWM modu

    10、le can support PWM pulse signals by initializing the control register and duty-cycle register with three methods just mentioned above to adjust the duty cycle and several operation modes to add flexibility for user.  The following section explains the architecture of the PWM module and the arch

    11、itectures of basic functional blocks. Section3 describes two operation modes. Experimental and simulation results verifying proper system operation are also shown in that section. Depending on mode of operation, the PWM module creates one or more pulse-width modulated signals, whose duty ratios can

    12、be independently adjusted. Implementation of PWM module in MCU Overview of the PWM module A block diagram of PWM module is shown in Fig.3. It is clearly from the diagram that the whole module is composed of two sections: PWM signal generator and dead-time generator with channel select logic. The PWM

    13、 function can be started by the user through implementing some instructions for initializing the PWM module. In particular, the following power and motion control applications are supported: DC Motor Uninterruptablel Power Supply (UPS) The PWM module also has the following features: Two PWM signal o

    14、utputs with complementary or independent operation Hardware dead-time generators for complementary mode 外文翻译  3 Duty cycle updates are configurable to be immediated or synchronized to the PWM  Fig.3 Architecture of PWM Module Details of the architecture PMW generator The architecture of th

    15、e 2-output PWM generator shown in Fig.4 is based on a 16-bit resolution counter which creates a pulse-width modulated signal. The system is synthesized by a system clock signal whose frequency can be divided by 4 times or 12 times through setting the value of T3M for PWM0 or T4M for PWM1 in the spec

    16、ial register PWMCON as shown in Fig.4. To PWM0 generator, the clock to 16-bit counter will be pre-divided by 4 times by default when T3M is set to zero. And the clock will be divided by 12 times when T3M is set to 1. This is also true for PWM1. The other bits in PWMCON are explained in detail in Table 1.   Fig .4  Bit Mapping of PWMCON      


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