1、附录 3：外文翻译 AT89C52 monolithic integrated circuit introduction AT89C52 is the low voltage which American ATMEL Corporation produces, the high performance CMOS 8 monolithic integrated circuits, internal may repeatedly scratch read-only program memory (PEROM) and 256bytes random access data-carrier stor
2、age (RAM) including 8k bytes which writes, the component uses ATMEL Corporation the high density, the non-volatility memory technology production, is compatible with the standard MCS-51 command system and 8052 product pins, internal sets at general 8 central processor (CPU) and the Flash memory cell
3、, the function formidable AT89C52 monolithic integrated circuit suits in many comparatively plurality of controls application situation. Main performance parameter: Are completely compatible with the MCS-51 product instruction and the pin The 8k byte may again scratch writes Flash to dodge the fast
4、memory 1000 times scratches the write cycle Entire static operation: 0Hz24MHz Three level of encryption program memory 2568 In byte RAM 32 programmable I/O mouth line 3 16 fixed time/counters 8 interrupt sources Programmable serial UART channel The low power loss idle and falls the electricity patte
5、rn Function characteristic outline: Below AT89C52 provides the standard function: 8k byte Flash dodges the fast memory, 256 byte internal RAM,32 I/O mouth line, 3 16 fixed time/counters, 6 vector two level of interrupt structures, A full-duplex serial passes unguardedly, internal oscillator and cloc
6、k electric circuit.At the same time, AT89C52 may fall to the 0HZ static state logical operation, and supports the electricity saving working pattern which two kind of softwares may elect.The idle way stops CPU the work, but permits RAM, fixed time/the counter, serial passes unguardedly and the inter
7、ruption system continues to work.Falls the electricity way to preserve in RAM the content, but the oscillator knock off and forbids other all part work to reposition until the next hardware. The pin function shows Vcc: Supply voltage GND: Grounding P0 mouth: The P0 mouth is one group of 8 leaks lead
8、s the way extremely the bidirectional I/O mouth, also is the address/data bus multiplying mouth.As outlet with when, each potential energy absorption current way actuates 8 TTL logic gate, when writes “1” to port P0, may take the high impedance input end uses. When visits exterior data-carrier stora
9、ge or the program memory, when this group of mouth line segment transforms the address (low 8) and the data bus multiplying, pulls the resistance in the visit activation interior. When Flash programming, P0 mouth receive instruction byte, but when program check, when output order byte, verification, outside the request joins pulls the resistance P1 mouth: P1 is in a belt interior pulls the resistance 8 bidirectional I/O mouth, the P1 output buffer may actuate (absorption or output current) 4 TTL logic gate.Writes “1” to the port, pulls the resistance through internal on to pull the port to
