1、 1、 外文原文 A: Fundamentals of Single-chip Microcomputer Th e si n gle - chip m icr o com pu t er i s th e cul min atio n o f b oth t he d ev el opm ent o f th e di git al co mp ut er an d th e in t egr at ed cir cui t argu abl y t h e t o w m os t si gni fi cant in v ent io ns o f t h e 20t h cent ur
2、y 1 . Th es e t ow t yp es o f ar chit ect u r e are f ou nd i n s in gl e - ch ip m icr o com pu t er. S om e emp lo y t h e sp lit p r o gr am/ d at a m em o r y o f th e H ar v ard ar chit ect u re, s ho w n in Fi g. 3 - 5A- 1 , oth er s fo ll ow th e phi lo so ph y, w i del y ad ap t ed f o r ge
3、n er al -p ur po s e com pu ter s and mi crop r o cess o rs , of m akin g no l o gical d ist in ct io n b et w een p ro gr am and d at a m em o r y as in t h e P ri n ceto n ar chit ect u r e, sh o wn i n Fi g. 3 -5A-2. In gen er al t erms a si n gl e - ch ip mi cr o comp ut er is ch aract eriz ed b
4、 y t h e in co rp or ation of all t he u ni ts o f a co mp ut er i nt o a s in gl e d ev ice, as s ho wn i n Fi g3 - 5A- 3. Fig.3-5A-1 A Harvard type Fig.3-5A-2. A conventional Princeton computer Program memory Data memory CPU Input& Output unit memory CPU Input& Output unit 2 Reset Interrupts Power
5、 Fig3-5A-3. Principal features of a microcomputer Read only memory (ROM).R O M i s us uall y f o r the p erm an ent, non- vo l atil e st o r age o f an ap pl icatio ns p r o gr am . M an y mi cro com put er s an d m ar e int end ed f o r hi gh -v ol um e ap pl icatio ns an d h ence t h e eco no mi c
6、al m an uf act ur e o f th e d evi ces r eq ui r es th at t h e co nt ents o f th e p r o gr am m em o r y b e comm itt ed p er m an entl y d u r in g t h e m anu f act ur e o f ch ip s . C learl y, t h is im pl ies a ri go ro us ap p ro ach t o R O M cod e d ev el opm ent si n ce ch an ges can no t
7、 b e m ad e aft er manu f a ct u re . T his d ev el opm ent p ro ces s m ay i n vo lv e emul at io n usi n g a so phi sti cat ed d ev el opm ent s ys t em wit h a h ard w are em ul ati on cap abili ty as w ell as th e u s e o f po w erf ul s oft w ar e t oo ls . S om e m an uf actu r ers p r ov id e
8、 add iti on al R OM o pti on s b y i n clu di n g i n t h ei r ra n ge d evi ces wit h (o r i nt en d ed f o r us e w ith ) u ser p r o gr am mabl e m emo r y. T h e sim pl es t of th es e i s u su al l y d ev i ce wh i ch can o p er at e in a m i cr opr o cesso r m od e b y u s in g s om e o f t he
9、 inp ut /o utp ut l in es as an ad dr ess an d dat a b us f o r acces sin g ex t ern al m emo ry. T h is t yp e o f d evi ce can b eh ave f u n cti on al l y as th e s in gl e chi p m i cr o co mp ut er f ro m w h ich it is d eri v ed al b eit w ith r est ri cted I/ O and a m od if ied ex ter n al c
10、i r cu it. Th e u se o f t h es e devi ces i s co mmo n ev en i n pro d uctio n ci r cu its wh er e t h e v ol um e do es no t j us ti f y t h e d ev el opmen t cost s o f External Timing components System clock Timer/ Counter Serial I/O Prarallel I/O RAM ROM CPU 3 cu st om o n - chi p R OM 2 ；t h e
11、r e can sti ll b e a s i gni fi can t s av in g i n I/ O and o th er chi ps com p ared t o a con v en tio n al mi cr op ro cess or bas ed ci r cuit . M o r e ex act r ep lacem ent f o r R OM d evices can b e ob t ain ed in t he fo rm o f v ari ant s wit h p i ggy - b ack E PR OM ( Eras abl e p ro gr
12、 amm abl e R OM )s o ck ets o r dev i ces w it h EPR OM ins t ead o f R OM 。 Th es e d evi ces ar e natu r al l y m o r e ex p en si ve t h an equi v al en t R O M devi ce, b ut d o p r ov id e com pl et e ci r cu it equ iv al ent s. E PR OM b as ed d evices ar e als o ex tr em el y at t r act ive f
13、 o r l o w -v olu me ap pl icatio ns wh er e th e y p r o vi de t he ad v an tages o f a si ngl e - chi p devi ce, i n t erm s of o n - chi p I/ O , et c. , wit h t he co nv eni en ce o f f l ex ib le u s er pr o gr amm abil it y. Random access memory (RAM).R A M i s fo r t he s to r age o f wo r ki
14、 n g v ari abl es an d d at a u s e d d u rin g p ro gr am ex ecu ti on . Th e siz e o f thi s m em o r y v ar i es with devi ce t yp e b ut i t h as t h e s ame ch ar act eri sti c w idt h ( 4 ,8 ,1 6 bit s etc. ) as t h e pr o ces so r ,Speci al fu ncti on r egist ers , su ch as s t ack p oin ter
15、o r tim er r egis t er are o f ten l o gi call y i n co rpo r at ed i nt o th e R AM ar ea. It is al so comm on i n H ar ard t yp e m i cr o co mp ut ers t o t r eat the R AM area as a co llecti on o f r egi st er； it is un necess ar y t o m ak e d ist in ct io n b et w een R AM and p r o cess or r
16、egi st er as is do ne i n th e cas e of a mi cro pr o ces so r sys t em s in ce RA M an d r e gis t er s ar e no t us u all y p h ys i cal l y s ep ar at ed i n a mi cro com puter . Central processing unit (CPU).T h e CP U is m uch li ke th at of an y m icr op r ocess o r. M an y ap p li cati on s o
17、 f m icr o com pu t er s and m icr o co nt ro ll ers inv ol v e t h e h an dli n g o f b in ar y - co d ed d ecim al ( BC D ) d at a ( fo r n um er i cal di sp la ys , f or ex amp l e) , h en ce it is com mo n t o fi nd t h at th e CP U i s w ell ad apt ed t o hand lin g th is t yp e o f dat a . It
18、is als o co mmo n to fin d goo d f aci lit ies f or t est in g, s ett in g and r es etti n g i nd ivi du al bit s of m em o r y o r I/ O s in ce m an y co nt r ol l er ap pl icatio ns i nv ol ve t h e t u rn in g o n an d o ff o f s in gle ou tp ut li nes o r t he r ead in g th e s in gl e lin e. T
19、h es e li n es ar e r eadil y i nter f aced t o tw o -st ate d ev ices su ch as s wi tch es , th ermo st at s, s oli d -st ate rel a ys , valv es , mo tor, et c. Parallel input/output. P ar all el in pu t an d ou tp ut s ch em es v ar y s om ewh at i n di ff eren t m i cr o co mp ut er； in m ost a m
20、 ech anis m i s p ro vi ded t o at l east all ow s om e fl ex ibi lit y o f cho os in g w hi ch p in s ar e ou tp uts and w h ich ar e in pu ts . Th is m ay ap p l y t o all o r s om e o f t h e por t s. Som e I/ O l in es are s uit abl e fo r d ir ect i nt er facing t o, fo r ex amp l e, fl uo r es
21、 cent d is pl ays , o r can p ro vi d e su ffi ci ent cur r ent t o m ak e i nt erf acin g ot h er co mp on ents s tr ai ght f or w ard . S om e d evi ces all o w an I/ O po r t t o b e co n fi gu r ed as a s ys t em bus t o allo w o ff - chi p m emo r y an d I/ O ex p ansi on. T hi s f acil it y i s po ten ti all y u s ef ul as a p ro du ct r an ge devel op s, si n ce s u ccess iv e enh ancem ents m ay b eco me t oo bi g fo r on - ch ip m emo r y an d it i s un d esi r abl e not to bui ld o n t h e ex is ti n g s o ft war e b as e.
