1、 1、 外文原文 A: Fundamentals of Single-chip Microcomputer Th e si n gle - chip m icr o com pu t er i s th e cul min atio n o f b oth t he d ev el opm ent o f th e di git al co mp ut er an d th e in t egr at ed cir cui t argu abl y t h e t o w m os t s i gni fi can t in vent io ns o f the 20 th cent u r
2、y 1 . Th es e t ow t yp es o f ar chit ect u r e are f ou nd i n s in gl e - ch ip m icr o com pu t er. S om e emp lo y t h e sp lit p r o gr am/ d at a m em o r y o f th e H ar vard ar chi t ectu r e, s ho w n in Fi g. 3 -5A-1 , other s f oll o w th e ph ilo so ph y, w i d el y ad apt ed fo r gen e
3、r al - p u rp os e com put er s and mi cr op ro cess o r s , o f m aki n g n o l o gical dis tin ctio n b etw een pr o gr am an d d at a m em or y as i n th e Pr in cet on ar chi t ectu r e, s ho w n in Fi g. 3 -5A-2. In gen er al t erms a si n gl e - ch ip mi cr o comp ut er is ch aract eriz ed b y
4、 t h e i n co r po r ati on of al l th e un its o f a co mp ut er i nt o a si ngl e d evi ce, as s ho w n i n Fi g3 -5A-3. Fig.3-5A-1 A Harvard type Fig.3-5A-2. A conventional Princeton computer Program memory Data memory CPU Input& Output unit memory CPU Input& Output unit Reset Interrupts Power Fi
5、g3-5A-3. Principal features of a microcomputer Read only memory (ROM).R O M i s us uall y f o r the p erm an ent, non- vo l atil e st o r age o f an ap pl icatio ns p r o gr am . M an y mi cro com put er s an d m ar e i nt en d ed fo r h i gh -v olu m e ap pl icati on s and h en ce t he econ omi cal
6、 m anu f act ur e o f t he d evi ces r eq ui r es that t he co nt ents o f th e p r o gr am m em o r y b e co mmit t ed p erman entl y d u ri n g t h e m anu f act ur e o f chip s . Cl earl y, t his i mpl i es a ri go ro us ap p ro ach to R O M co d e d ev elo pm ent s in ce ch an ges can not b e m
7、ade aft er m anuf a ctu r e . Thi s d ev elo pm ent p ro ces s m ay i n v ol ve em ul ati on u si n g a so phi sti cated d ev elo pm ent s ys t em wit h a h ard w are emul atio n cap abil it y as w ell as t h e us e o f po w erfu l so ft w ar e t oo ls . S om e m an uf actu r ers p r ov id e add iti
8、 on al R OM o pti on s b y i n cl ud in g i n th ei r r a n ge d evices w it h (o r in t en ded fo r us e wit h) u ser p ro gr am m abl e m em o r y. T h e sim ples t of t h es e is u su al l y d ev i ce wh ich can op er at e in a m icr op r ocess o r m od e b y u s in g som e of th e in pu t/o ut p
9、ut li n es as an add r es s an d d at a bu s f o r acces sin g ex t ern al mem or y. T h is t yp e o f d ev i ce can b eh av e f u n cti on al l y as t h e s in gl e chi p mi cro com pu ter f rom w hi ch i t is d eri v ed al beit w it h r es t ri ct ed I/ O an d a m odi fi ed ex ter n al ci r cu it.
10、 Th e us e o f th es e d evi ces i s co mm on ev en in p ro du ctio n ci r cu its wh er e t h e v ol um e do es no t j ust i f y t h e d ev el opm ent co st s o f cu st om on - chip RO M 2 ；t h er e can s till b e a s i gni fi can t savi n g in I/ O and o th er chip s com p ar ed t o a co n venti on
11、 al m icr op r ocess o r based ci r cu it. M o re exact r epl acem en t f or RO M d ev ices can External Timing components System clock Timer/ Counter Serial I/O Prarallel I/O RAM ROM CPU b e o bt ai n ed i n t h e fo r m of v ari ants with pi gg y - b ack EPRO M ( Er as abl e p r o gr am mabl e R O
12、M )s o ck et s or d evices w it h EPR OM ins t ead o f RO M 。T h es e d evi ces ar e nat ur all y m o r e ex p en si v e th an equi v al en t RO M d ev i ce, but d o p ro vi d e co mpl ete cir cuit eq ui val ents . EPR OM b as ed d ev i ces ar e als o ex tr em el y at t r acti ve f o r l o w- vo lum
13、 e ap pl icatio ns wh er e th e y p r o vi de t h e ad v an tages o f a s ingl e - chi p d evi ce, i n t erm s o f on - chi p I/ O , et c. , wi th th e co nv eni en ce o f f l ex ib le u s er pr o gr amm abil it y. Random access memory (RAM).R A M i s fo r t he s to r age o f wo r ki n g v ari abl e
14、s an d d at a u s e d d u rin g p ro gr am ex ecu ti on . Th e siz e o f thi s m emo r y v ari es wi th d ev i ce t yp e b ut it h as t h e s ame ch ar act eri sti c w idt h ( 4, 8, 16 bi ts et c.) as th e p r o cesso r ,S p eci al f un ction r egi st ers , su ch as st ack poi nt er o r t im er r eg
15、ist er ar e of t en l o gicall y i n co rp o r at ed i nto t h e RA M ar ea. It is al so co mmo n in Har ard t yp e mi cro com put er s t o t r eat th e R AM ar ea as a co ll ecti on o f r egi ster ； it is u nn eces s ary t o mak e di sti n ctio n b et w een R AM an d p ro ces so r r egi st er as is
16、 d on e in the case o f a m i cr op ro cess or s ys t em s in ce RA M and re gi st ers ar e n ot us u all y p h ys i call y s ep arat ed i n a m icr o com pu t er . Central processing unit (CPU).T h e CP U is m uch li ke th at of an y m icr op r ocess o r. M an y ap p li cati on s o f m icr o com pu
17、 t er s and m icr o co nt ro ll ers i nv ol ve t h e h an dli ng o f b in ar y - co d ed decim al ( BC D ) d at a ( f o r nu m er i cal d is pl ays , f o r ex amp l e) , h en ce it is com mo n t o fi nd t h at th e CP U is w ell ad apt ed t o h an dli ng t hi s t yp e o f d at a . It i s al so co mm
18、o n t o fi nd goo d f acili ti es fo r t est ing, s ett in g and r es ett in g i nd ivi du al bit s o f memo r y o r I/ O s in ce m an y co nt r ol l er app li cati on s in vo lv e th e t ur ni n g o n and o ff o f si n gle o ut pu t li nes o r t he r eadi n g th e si n gl e li n e. Th es e l in es
19、ar e r eadil y i n t erf aced t o t w o- st at e d evi ces s u ch as sw it ch es, t h er mo st at s, so lid -s t at e r el a ys , v al v es, m ot or, etc. Parallel input/output. P ar all el in pu t an d ou tp ut s ch em es v ar y s om ewh at in d i fferen t mi cro comp ut er； i n mo st a m ech anism
20、 i s p r ovi d ed t o at l eas t al lo w so m e flex ibi lit y o f cho osin g w hi ch p in s ar e ou tp ut s an d w hi ch ar e i np ut s. T hi s m ay ap p l y t o all o r som e o f th e p or ts . S om e I/ O l in es are s uit abl e f o r di r ect in t er f aci n g t o, f o r ex ampl e, fl uo r escen
21、t d is pl ays , o r can p r ov id e su ff ici ent cu r r en t t o m ak e in ter f acin g oth er comp o nent s s t rai ght fo r w ard . S om e d evi ces allo w an I/ O po rt t o be co nf i gu r ed as a s ys tem b us t o all o w o ff - chi p m emo r y an d I/ O ex p an si on . Th is f aci lit y i s po
22、t enti all y u s eful as a pr od u ct r an ge d ev elo ps , sin ce s u ccess iv e enhan cem ent s m a y b ecom e to o bi g f o r o n - chi p m emo r y and it i s u nd esi r abl e n ot to b uil d on th e ex ist in g so ft w ar e bas e. Serial input/output .S er i al com mu nicati on wit h t erm in al d evi ces is co mmo n m eans o f p r ov idi n g a lin k usi n g a sm all n um b er o f lin es. T hi s so rt
