1、 1 毕业设计 (论文 ) 外文资料翻译 学生姓名： 学 号： 所在学院： 专 业： 指导教师： 2013 年 4 月 18 日 2 Hybrid Evolutionary Algorithm based solution for Register Allocation for Embedded Systems Anjali Mahajan G H Raisoni College of Engineering, Nagpur, India Email : M S Ali Prof. Ram Meghe Institute of Technology and Research, Badnera
2、, Amravati, India Email : Abstract Embedded systems have an ever-increasing need for optimizing compilers to produce high quality codes with a limited general purpose register set. Either memory or registers are used to store the results of computation of a program. As compared to memory, accessing
3、 a register is much faster, but they are scarce resources and have to be utilized very efficiently. The optimization goal is to hold as many live variables as possible in registers in order to avoid expensive memory accesses. We present a hybrid evolutionary algorithm for graph coloring register all
4、ocation problem based on a new crossover operator called crossover by conflict-free sets(CCS) and a new local search function. Index Termscompilers, compiler optimization, register allocation, hybrid evolutionary algorithm, embedded systems I. INTRODUCTION Register allocation is one of the most impo
5、rtant optimizations a compiler performs and is becoming increasingly important as the gap between processor speed and memory access time widens. Its goal is to find a way to map the temporary variables used in a program into physical memory locations (either main memory or machine registers). Access
6、ing a register is much faster than accessing memory； therefore one tries to use registers as much as possible. Of course, this is not always possible, thus some variables must be transferred (spilled) to and from memory. This has a cost, the cost of load and store operations, which should be avoided
7、 as much as possible. Typically, this degrades runtime performance and increases power consumption. Therefore, an efficient mapping should generally minimize the register requirements and the number of spilling instructions. The critical applications, especially in embedded computing, industrial com
8、pilers are ready to accept longer compilation times if the final code gets improved. This approach attempts to combine the flexibility of general-purpose programmable processors with the performance achieved by domain-specific architectureoptimizations. Compilers for embedded processors must cope with these architectural optimizations and be able to exploit them. This paper presents a heuristic algorithm for graph coloring register allocation
